Conventionally, various methods for storing data are developed in a non-volatile memory capable of storing data without power supplied. For example, in a spin transfer torque-magnetic random access memory (STT-MRAM) utilizing a spin injection writing method in which magnetization is reversed by spin transfer torque, data is stored according to a magnetization direction of a magnetic material. Therefore, a non-volatile memory using the STT-MRAM as a storage element may rewrite data at a high speed and rewrite data almost infinite number of times, so that development into a code storage, a working memory and the like is expected.
The storage element of the STT-MRAM is configured by a magnetic tunnel junction (MTJ) in which a tunnel insulating layer is stacked between a magnetic layer in which magnetization is fixed (hereinafter referred to as a fixed layer) and a magnetic layer in which the magnetization is not fixed (hereinafter referred to as a storage layer). In the storage element of the STT-MRAM, data “0” or “1” is read by using a so-called tunnel magnetoresistive effect in which resistance of the magnetic tunnel junction changes depending on the magnetization direction of the fixed layer and the magnetization direction of the storage layer.
For example, when the data is written in the storage element of the STT-MRAM, a certain or larger current is allowed to flow through the magnetic tunnel junction, and the magnetization directions of the fixed layer and the storage layer are changed from a parallel state to an antiparallel state or from the antiparallel state to the parallel state depending on the direction of a write current. At that time, a required write current is larger when changing the magnetization directions of the fixed layer and the storage layer from the parallel state to the antiparallel state.
In addition, a memory cell including a circuit configuration necessary for holding the data in the storage element conventionally includes a selection transistor and a storage element (1-bit MTJ) (refer to FIG. 2 to be described later). For example, one end of the storage element is connected to a bit line, the other end thereof is connected to a drain of the selection transistor, and a source terminal of the selection transistor is connected to a source line. Then, the selection transistor is turned on to control a voltage of the source line or the bit line, and the direction of the write current is changed, so that the data is rewritten in the storage element.
By the way, when the data is written in the memory cell, a memory cell might occur in which a current equal to or larger than a threshold is applied to the storage element due to fluctuation in power supply voltage within a specified range, variation in characteristic of the selection transistor, a change in resistance value due to processing dimension variation of the storage element and the like. In that case, the voltage applied to the storage element might become larger than an element breakdown voltage, and if such voltage is applied, the storage element might be broken, so that there is a fear that reliability is deteriorated.
Therefore, for example, Patent Document 1 proposes the technology of detecting a voltage applied to both ends of a memory cell, and feeding back a detection result to a voltage to be applied to a word line of a selection transistor of the memory cell. As a result, it is possible to control the write current, suppress the breakdown of the storage element, and perform appropriate current control against current shortage at the time of writing.